Trends and Challenges in VLSI Scaling Towards 100 nm
DOI:10.1109/ASPDAC.2002.994875
Source IEEE Xplore
Conference:
Design Automation Conference, 2002. Proceedings of ASP-DAC 2002. 7th Asia and South Pacific and the 15th International Conference on VLSI Design. Proceedings.
Information
Summary form only given. Moore’s Law is driving VLSI technology to continually increase transistor density and higher clock frequencies. This tutorial will review VLSI scaling trends over the past few years and discuss the challenges facing process and circuit engineers in the 100nm generation and beyond. The first area of interest is process technology, including transistor scaling trends and research activities for the 100nm technology node and beyond. The transistor drain and the delay of the RC junction will continue to increase.
This tutorial will review new circuit design techniques for emerging process technologies, including dual Vt transistors and silicon-on-insulator. It will also cover circuit and layout techniques for reducing clock distribution distortion and jitter, modeling and reducing transistor leakage, and improving the electrical performance of flip-chip packages. Finally, the tutorial will review the testing challenges for the 100nm technology node due to increased clock frequency and power consumption (both active and passive) and present some potential solutions.
National Conference on Latest Trends in VLSI, Communication and Embedded Technologies 2018, Dr Sivanthi Aditanar College of Engineering, National Conference, Tiruchendur, Tamil Nadu, 16 March 2018
About the event
The conference focuses on the latest trends in VLSI, communication and embedded technologies to disseminate knowledge about developments in areas such as RF, DSP, image and signal processing, embedded systems, sensors and networks with respect to VLSI, communication and embedded applications.
Events
- Paper presentation at a national conference
- PPT topics
Embedded real-time systems
* Embedded system design with VLSI
*Application of image processing in VLSI
* MEMS and NEMS
* Multi-antenna communication technology
* 3G/4G wireless technology
* Emerging topics in VLSI signal processing
* VLSI for communication and biomedical signal processing
* CAD for VLSI
* Embedded and multi-core DSP system design
* Built-in system in Bio-Medical
Application
* Embedded system in military applications
* Statistical signal processing
* Modeling of semiconductor devices
* High performance DSP architecture
* Microsystems for signal processing
*Low power VLSI design
* VLSI testing
Symposia on VLSI Technology & Circuits 2018 Covers Converging Trends in Machine Learning, Artificial Intelligence and IoT
Symposia on VLSI Technology & Circuits 2018 will bring a unique insight into the technological ecosystem of converging industry trends – machine learning, IoT, artificial intelligence, wearable/implantable biomedical applications, big data and cloud computing – the emerging technologies needed for ‘smart living.” During the week-long conference packed with technical presentations, demonstrations, panel discussions, breakout sessions, short courses and a new “Friday Forum” on machine learning, the premier international microelectronics industry conference covers technology, circuits and systems with a scale and scope unlike any other conference.
Built around the theme of “Technology, Circuits, and Systems for Smart Living,” the Symposia program integrates the development of advanced technologies, innovative circuit design, and applications that enable the adoption of smart, connected devices and systems that are transforming our global society. the way people interact with each other.
Plenary session (June 19):
The symposia will open with two technology plenary sessions, including “Memory Technology: The Core Enabling Future Computing Systems” by Scott DeBoer, Executive Vice President, Technology Development, Micron; and “Revolutionizing Cancer Genomic Medicine by Artificial Intelligence & Supercomputing with Big Data” by Satoru Miyano, Director of the Human Genome Center, Institute of Medical Science, University of Tokyo.
The following Circuits plenary sessions include “Hardware-Enabled Artificial Intelligence” by Dr. Bill Dally, Chief Scientist and Senior VP, Nvidia; and “Semiconductor Technologies Accelerate Our Future Vision: “The ANSHIN Platform” by Tsuneo Komatsuzaki, Advisor, SECOM.
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